aboutsummaryrefslogtreecommitdiff
path: root/src/chips/esfmu_opl3.cpp
diff options
context:
space:
mode:
authorWohlstand <admin@wohlnet.ru>2025-03-24 13:20:42 +0300
committerWohlstand <admin@wohlnet.ru>2025-03-24 13:20:42 +0300
commit0868e68e0ea879652dd8841fab1d569d78345755 (patch)
treee80c90058f5b3b4cc72c2e96a469e380f6de1a6f /src/chips/esfmu_opl3.cpp
parentbee3fd0d7460d449a167b732213a7fc0cd43cfe9 (diff)
downloadlibADLMIDI-0868e68e0ea879652dd8841fab1d569d78345755.tar.gz
libADLMIDI-0868e68e0ea879652dd8841fab1d569d78345755.tar.bz2
libADLMIDI-0868e68e0ea879652dd8841fab1d569d78345755.zip
ESFMu: Added custom queue
as built-in is faulty
Diffstat (limited to 'src/chips/esfmu_opl3.cpp')
-rw-r--r--src/chips/esfmu_opl3.cpp45
1 files changed, 39 insertions, 6 deletions
diff --git a/src/chips/esfmu_opl3.cpp b/src/chips/esfmu_opl3.cpp
index 4f4a96d..67056d0 100644
--- a/src/chips/esfmu_opl3.cpp
+++ b/src/chips/esfmu_opl3.cpp
@@ -23,10 +23,13 @@
#include <cstring>
ESFMuOPL3::ESFMuOPL3() :
- OPLChipBaseT()
+ OPLChipBaseT(),
+ m_headPos(0),
+ m_tailPos(0),
+ m_queueCount(0)
{
m_chip = new esfm_chip;
- setRate(m_rate);
+ ESFMuOPL3::setRate(m_rate);
}
ESFMuOPL3::~ESFMuOPL3()
@@ -53,19 +56,49 @@ void ESFMuOPL3::reset()
void ESFMuOPL3::writeReg(uint16_t addr, uint8_t data)
{
- esfm_chip *chip_r = reinterpret_cast<esfm_chip*>(m_chip);
- ESFM_write_reg_buffered_fast(chip_r, addr, data);
+ Reg &back = m_queue[m_headPos++];
+ back.addr = addr;
+ back.data = data;
+
+ if(m_headPos >= c_queueSize)
+ m_headPos = 0;
+
+ ++m_queueCount;
+ // esfm_chip *chip_r = reinterpret_cast<esfm_chip*>(m_chip);
+ // ESFM_write_reg_buffered(chip_r, addr, data);
}
void ESFMuOPL3::writePan(uint16_t addr, uint8_t data)
{
- esfm_chip *chip_r = reinterpret_cast<esfm_chip*>(m_chip);
- // OPL3_WritePan(chip_r, addr, data);
+ // FIXME: Implement panning support
+ // esfm_chip *chip_r = reinterpret_cast<esfm_chip*>(m_chip);
+ // ESFM_write?pan(chip_r, addr, data);
+ (void)(addr);
+ (void)(data);
}
void ESFMuOPL3::nativeGenerate(int16_t *frame)
{
esfm_chip *chip_r = reinterpret_cast<esfm_chip*>(m_chip);
+ uint32_t addr = 0xffff, data;
+
+ // see if there is data to be written; if so, extract it and dequeue
+ if(m_queueCount > 0)
+ {
+ const Reg &front = m_queue[m_tailPos++];
+
+ if(m_tailPos >= c_queueSize)
+ m_tailPos = 0;
+ --m_queueCount;
+
+ addr = front.addr;
+ data = front.data;
+ }
+
+ // write to the chip
+ if(addr != 0xffff)
+ ESFM_write_reg(chip_r, addr, data);
+
ESFM_generate(chip_r, frame);
}